Patent Examiner Vu A. Vu
Art Unit 2897 · Active Solid-State (Semiconductor) Devices & Manufacturing · Tech Center 2800 · 435 applications since 2021
Vu A. Vu is a USPTO patent examiner in Art Unit 2897 (Active Solid-State (Semiconductor) Devices & Manufacturing) who has examined 435 applications in filing years 2021–2025. Examiner Vu's allowance rate is 95.2%, above the 82.1% USPTO average; the examiner ranks easier than 75% of examiners. Applicants who held an examiner interview saw a 7.7 percentage-point lift in allowance in 2024.
Data through March 2026 · Source: USPTO Patent Center (formerly PAIR) · Methodology
Overview
FreeExaminer details
- Art unit2897 · Active Solid-State (Semiconductor) Devices & Manufacturing
- Title / gradePrimary Patent Examiner · GS-14
- Service13 years
- Phone(571) 270-7467
- Email[email protected]
- LocationAlexandria, VA 22314
- On office actionsVu, Vu A
Examiner Vu can allow an application without a supervisory sign-off, which is why an examiner interview can be decisive.
How to improve your odds with Examiner Vu
- Interview results are mixed year to year. The largest measured lift was 7.7 points in 2024, but at least one year ran the other way; weigh the year-by-year table below.
- Plan for the timeline. First office action averages 629 days vs the 589-day USPTO norm.
- Expect a §102. Novelty is the most-issued rejection (307), and applicants overcame it 82.2% of the time.
- The data favors an RCE here. Cases with an RCE allowed at 100.0% versus 91.7% without in 2024.
- This docket has supported broader claims. With a 95.2% allowance rate, preserving breadth where the specification supports it has been viable.
Historical patterns from this examiner's past cases, shown for general information. This is not legal advice and does not predict the outcome of any specific application. Decisions about interviews, RCEs, and claim strategy should be made with a licensed patent attorney or agent.
Rejection patterns & how they get overcome
FreeREMARKS: Applicant respectfully traverses the rejection under 35 U.S.C. §102. The cited reference fails to disclose, expressly or inherently, each and every element of the claim as arranged in the claim, and in particular does not disclose at least the limitation directed to ...
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Trends
| Year | Interview rate | Allowance w/ interview | Allowance w/o | Delta |
|---|---|---|---|---|
| 2024 | 12.5% | 100.0% | 92.3% | +7.7pp |
| 2023 | 15.4% | 90.0% | 95.8% | -5.8pp |
| 2022 | 20.9% | 100.0% | 95.6% | +4.4pp |
| 2021 | 21.4% | 100.0% | 92.9% | +7.1pp |
RCE behavior
Allowance after a Request for Continued Examination versus without one, per year. Use it to judge whether an RCE is worth the cost in front of Examiner Vu.
| Year | RCE rate | Allowance w/ RCE | Allowance w/o | Delta |
|---|---|---|---|---|
| 2024 | 18.8% | 100.0% | 91.7% | +8.3pp |
| 2023 | 3.5% | 100.0% | 94.4% | +5.6pp |
| 2022 | 10.1% | 100.0% | 96.2% | +3.8pp |
| 2021 | 9.7% | 100.0% | 93.9% | +6.1pp |
Recent outcomes
Free🔒 Case detail: members| App # | Title | Outcome | OAs | Arguments & redline |
|---|---|---|---|---|
| 17/915335 | Method for Manufacturing Semiconductor Element, Semiconductor Element Body, and Semiconductor Element Substrate | Patented | 1 | 🔒 View |
| 18/115043 | Carrier Plate for Preparing Package Substrate, Package Substrate Structure and Manufacturing Method Thereof | Patented | 1 | 🔒 View |
| 17/939325 | Semiconductor Device and Semiconductor Device Manufacturing Method | Patented | 1 | 🔒 View |
| 18/329588 | Semiconductor Device and Method of Fabricating the Same | Patented | 2 | 🔒 View |
Technology & expertise
Frequently asked questions
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