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Patent Examiner Ida M. Soward

Art Unit 2898 · Semiconductor Power & Logic Transistors, Packaging & Displays · Tech Center 2800 · 492 applications filed 2021–2026

✓ Favorable · easier than 95% of examiners● Free examiner data

Ida M. Soward is a USPTO patent examiner in Art Unit 2898 (Semiconductor Power & Logic Transistors, Packaging & Displays) with 492 applications from filing years 2021–2026. Examiner Soward's allowance rate is 96.9%, above the 82.5% USPTO average for applications filed in the same years. The examiner ranks easier than 95% of examiners.

Draft a response to Examiner SowardSee the strategy data ↓

Data through October 2026 from USPTO Patent Center (formerly PAIR) · Methodology

Overview

Free
Difficulty · Favorable
easier than 95% of examiners
Easier4th percentileHarder
Allowance rate vs peers
Examiner Soward96.9%
Art Units 2822 and 289892.2%
USPTO average82.5%
Allowance rate
96.9%
▲ USPTO avg 82.5%
Applications
492
filing years 2021–2026
First-action allowance
17.8%
patented with no rejection
Abandoned
2.4%
share of applications
Avg office actions
1.3
USPTO avg 1.3
Days to first OA
709
▲ USPTO 619
RCE rate
7.7%
USPTO 19.6%
Interview rate
16.3%
USPTO 27.4%

Examiner details

  • Art unit2898 · Semiconductor Power & Logic Transistors, Packaging & Displays
  • Title / gradePrimary Patent Examiner · GS-14
  • Service25 years
  • PhoneOn each office action
  • Email[email protected]
  • In USPTO recordsSOWARD, IDA M
Full signatory authority

Examiner Soward can allow an application without a supervisory sign-off.

Examines (USPC classes)
257 · Active Solid-State Devices (Transistors, Diodes)

How to improve your odds with Examiner Soward

  • Interview results are mixed year to year. Interviewed cases were allowed more often in 2 of the 4 measured years. Weigh the year-by-year table below.
  • Plan for the timeline. First office action averages 709 days vs the 619-day USPTO norm.
  • Expect a §112. Definiteness & disclosure is the most-issued rejection (220), and applicants overcame it 86.4% of the time.
  • RCE outcomes are mixed year to year. Cases with an RCE were allowed more often in 2 of the 3 measured years. Weigh the year-by-year table before spending the fee.

Historical patterns from this examiner's past cases, shown for general information. This is not legal advice and does not predict the outcome of any specific application. Decisions about interviews, RCEs, and claim strategy should be made with a licensed patent attorney or agent.

Rejection patterns & how they get overcome

Free
§102 Novelty194 issued · 88.7% overcome
§103 Obviousness131 issued · 86.7% overcome
§112 Definiteness & disclosure220 issued · 86.4% overcome
How applicants traverse §112 rejections🔒 Members

Of the 87 winning responses to Examiner Soward's §112 rejections that Boundly has classified, 44 (51%) amended the claims and argued, 32 amended without arguing, and 11 argued without amending. Each winning response, with its arguments and claim amendments, is in the file wrapper.

Read the winning §112 argumentsFull REMARKS, amendments, claim trees & redlines from the file wrappers
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RCE behavior

Allowance after a Request for Continued Examination versus without one, per year. Use it to judge whether an RCE is worth the cost in front of Examiner Soward.

YearRCE rateAllowance w/ RCEAllowance w/oDelta
20236.2%100.0%97.7%+2.3pp
20229.2%100.0%97.7%+2.3pp
202111.7%93.3%96.5%-3.2pp

Recent outcomes

Free🔒 Case detail for members
App #TitleOutcomeOAsArguments & redline
18/486853Semiconductor Devices Including Backside and Vertical Power StructuresPatented1🔒 View
18/197593Display Apparatus Including Peripheral Area Power Supply LinePatented2🔒 View
18/461541Display Device Including Curved Shape Planarization Layer Outer EdgePatented1🔒 View
18/279394Display Panel and Display Device Including Edge Ground Traces and Antenna Projection RegionPatented1🔒 View
See all 492 applications with full file-wrapper detailOffice action text, attorney arguments, amendments & claim-by-claim track changes
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Art Unit 2898 technology

Power & logic transistorsPackaging & interconnectsLight-emitting displaysNonvolatile & dynamic memoryTop CPC H10W · H10D · H10P
About this examiner. Ida M. Soward examines in Art Unit 2898 (Semiconductor Power & Logic Transistors, Packaging & Displays, Tech Center 2800). The art unit's docket includes power & logic transistors, packaging & interconnects, light-emitting displays, and nonvolatile & dynamic memory.

Frequently asked questions

What is Examiner Ida M. Soward's allowance rate?
Examiner Soward's allowance rate is 96.9%, compared with 82.5% across the USPTO and 92.2% in Art Units 2822 and 2898 for applications filed in the same years. That rate ranks Examiner Soward easier than 95% of examiners.
Is Examiner Soward a favorable examiner?
Relatively, yes. Examiner Soward ranks easier than 95% of examiners, in the 4th difficulty percentile (favorable). Examiner Soward has a 96.9% allowance rate versus 82.5% across the USPTO and 92.2% in Art Units 2822 and 2898, 1.3 office actions per application versus 1.3, and an RCE rate of 7.7% versus 19.6% across the USPTO, for applications filed in the same years.
Do examiner interviews help with Examiner Soward?
It has varied by year. Decided applications with an interview were allowed more often in 2 of the 4 measured years. In 2022, 100.0% of decided applications with an interview were allowed, versus 97.3% of those without. In 2021, the figures were 94.4% versus 96.4%.
What is Examiner Soward's most common rejection?
§112 definiteness & disclosure, issued 220 times in the data. Applicants overcame it 86.4% of the time. Of the 87 winning responses Boundly has classified, 44 amended the claims and argued.
Is an RCE worth filing with Examiner Soward?
It has varied by year, so the table is the better guide. Decided applications with an RCE were allowed more often in 2 of the 3 measured years. In 2022, 100.0% of decided applications with an RCE were allowed, versus 97.7% of those without one. In 2021, the figures were 93.3% versus 96.5%.
How long until the first office action from Examiner Soward?
About 709 days on average, versus 619 days across the USPTO for applications filed in the same years.
How do I contact Examiner Ida M. Soward?
Examiner Soward can be reached by email at [email protected]. The examiner's direct line is listed at the end of the examiner's office actions.

Put Examiner Soward's data to work on your next response.

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Statistics are computed by Boundly Prosecution Intel from USPTO Patent Center (formerly PAIR) file wrappers for filing years 2021–2026, refreshed regularly. Allowance rate (sometimes called grant rate) is the share of disposed applications that issued as patents. Office actions here are non-final and final rejections, so restriction requirements and allowances are not counted. USPTO benchmarks are weighted to each examiner's mix of filing years, and art-unit benchmarks to the art units and filing years of the examiner's own applications, so they compare like for like. The difficulty percentile ranks examiners, each counted once, so it can point the other way from the USPTO average, which counts applications. See how each number is computed. The year-by-year interview and RCE tables show up to four recent filing years, leaving out the newest one and any year with fewer than ten applications or five decided applications on either side. Historical data is provided for informational purposes only. Past examiner behavior does not guarantee future outcomes, and nothing here is legal advice or a substitute for advice from a licensed patent attorney or agent. Are you Ida M. Soward, or see an error? Request a correction.